Johnston, S, Prasad, G, Maguire, LP, McGinnity, TM and Wu, Q (2003) A Design Flow for the Hardware Implementation of Spiking Neural Networks onto FPGAs. In: IEEE Cybernetics Intelligence - Challenges and Advances (CICA) 2003, Reading, UK. IEEE. 6 pp. [Conference contribution]
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Spiking neural networks (SNN) are biological more plausible models that use spikes as the means of temporal and spatial coding of information. The problem arises in that large numbers of these neurons communicating in parallel with real time requirements are necessary for cutting edge sensory applications. This requires that new hardware or software techniques have to be developed. Here a novel codesign is presented incorporating the benefits of state-of-the-art field programmable gate array (FPGA) technology aided with a software system employing a visual data flow environment to create a rapid flexible platform for the simulation and implementation of SNN.
|Item Type:||Conference contribution (Paper)|
|Faculties and Schools:||Faculty of Computing & Engineering|
Faculty of Computing & Engineering > School of Computing and Intelligent Systems
|Research Institutes and Groups:||Computer Science Research Institute|
Computer Science Research Institute > Intelligent Systems Research Centre
|Deposited By:||Professor Girijesh Prasad|
|Deposited On:||16 May 2011 11:31|
|Last Modified:||20 May 2011 15:38|
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