Abstract

The need for inexpensive, compact and adaptive systems prompted considerable interest in the hardware–software co-design of embedded systems. In particular, Dynamically Reconfigurable Embedded Systems, which exploit the advances in Field Programmable Gate Array (FPGA) technology, facilitate customisation of their hardware resources during runtime to meet the demands of executing applications. The ability to estimate the resultant acceleration obtained is highly desirable, as time to market deadlines are being ever shortened. The performance of such systems is fundamentally dependent on the hardware–software partition. In this paper, a genetic algorithm-based (GA) hardware–software partitioning method is presented. Demonstrative applications are used to illustrate the effectiveness of the GA approach at exploiting the inherent reconfigurable nature of such systems to obtain optimal or near optimal performance speedup relative to a conventional software implementation. Author Keywords: HW–SW partitioning; Dynamic reconfiguration; Genetic algorithms