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Real-time 2-D wavelet transform implementation for HDTV compression

Biomedical Sciences Research Institute Computer Science Research Institute Environmental Sciences Research Institute Nanotechnology & Advanced Materials Research Institute

Uzun, IS and Amira, A (2005) Real-time 2-D wavelet transform implementation for HDTV compression. REAL-TIME IMAGING, 11 (2). pp. 151-165. [Journal article]

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DOI: 10.1016/j.rti.2005.01.001

Abstract

Recent advances in image analysis have shown that the application of 2-D discrete biorthogonal wavelet transform (DBWT) to digital image compression overcomes some of the barriers imposed by block-based transform coding algorithms while offering significant advantages in terms of coding gain, quality, natural compatibility with video formats requiring lower-resolution and graceful performance degradation when compressing at low bit rates. This paper reports on the design and field programmable gate array (FPGA) implementation of a non-separable 2-D DBWT architecture which is the heart of the proposed high-definition television (HDTV) compression system. The architecture adopts periodic symmetric extension at the image boundaries, therefore it conforms the JPEG-2000 standard. It computes the DBWT decomposition of an N x N image in approximately 2N(2)/3 clock cycles (ccs). Hardware implementation results based on a Xilinx Virtex-2000E FPGA chip showed that the processing of 2-D DBWT can be performed at 105 MHz providing a complete solution for the real-time computation of 2-D DBWT for HDTV compression. (C) 2005 Elsevier Ltd. All rights reserved.

Item Type:Journal article
Faculties and Schools:Faculty of Computing & Engineering
Faculty of Computing & Engineering > School of Engineering
Research Institutes and Groups:Engineering Research Institute
Engineering Research Institute > Nanotechnology & Integrated BioEngineering Centre (NIBEC)
ID Code:13440
Deposited By:Dr Abbes Amira
Deposited On:20 May 2010 11:26
Last Modified:25 Jul 2011 12:28

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