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Field programmable gate array based parallel matrix multiplier for 3D affine transformations

Biomedical Sciences Research Institute Computer Science Research Institute Environmental Sciences Research Institute Nanotechnology & Advanced Materials Research Institute

Bensaali, F. and Amira, A (2006) Field programmable gate array based parallel matrix multiplier for 3D affine transformations. IEE PROCEEDINGS-VISION IMAGE AND SIGNAL PROCESSING, 153 (6). pp. 739-746. [Journal article]

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DOI: 10.1049/ip-vis:20045076

Abstract

3D graphics performance is increasing faster than any other computing application. Almost all PC systems now include 3D graphics accelerators for games, computer aided design or visualisation applications. This article investigates the suitability of field programmable gate array devices as an accelerator for implementing 3D affine transformations. Proposed solution based on processing large matrix multiplication have been implemented, for large 3D models, on the RC1000 Celoxica board based development platform using Handel-C. Outstanding results have been obtained for the acceleration of 3D transformations using fixed and floating-point arithmetic.

Item Type:Journal article
Faculties and Schools:Faculty of Computing & Engineering
Faculty of Computing & Engineering > School of Engineering
Research Institutes and Groups:Engineering Research Institute
Engineering Research Institute > Nanotechnology & Integrated BioEngineering Centre (NIBEC)
ID Code:13423
Deposited By:Dr Abbes Amira
Deposited On:20 May 2010 11:27
Last Modified:25 Jul 2011 12:28

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